This is reference to Raspberry Pi GPIO, not to Raspberry Pi 2 GPIO.

GPIO or General Purpose Input/Output is a generic pin on a chip whose behavior (including whether it is an input or output pin) can be controlled (programmed) through software. One pin can be act as either Input or Output but can’t be both at a time, means it cannot send and receive data at same time.

GPIO pins have no special purpose defined, and go unused by default.

The Raspberry Pi allows peripherals and expansion boards (such as Rpi Gertboard) to access the CPU by exposing the inputs and outputs.

Quick Cheatsheet

raspberry-pi-gpio-cheat-sheet

Only covers P1 Header

Hardware

P1 Header

Raspberry Pi (both model A and B) has 26 pin 2.54mm (100 mil) expansion header, marked as P1, arranged in a 2×13 strip. They provide 8 GPIO pins plus access to I²C, SPI, UART, as well as +3.3 V, +5 V and GND supply lines. Pin one is the pin in the first column and on the bottom row.

RPi_P1_header

The GPIO pin-header layout, seen from top. Three pins changed between PCB rev.1 and rev.2.

GPIOs

GPIO voltage levels are 3.3 V and are not 5V tolerant. There is no over voltage protection on the board. Thus, you should use an external board with buffers, level conversion, and analog I/O rather than soldering directly onto the main board.

All the GPIO pins can be reconfigured to provide alternate functions, SPI, PWM, I²C, and so. At reset only pins GPIO 14 & 15 are assigned to the alternate function UART, those two can be switched back to GPIO to provide a total of 17 GPIO pins.

Each GPIO can interrup, high/low/rise/fall/change. There is currently no support for GPIO interrupts in the official kernel. However there is a patch, requiring compilation of modified source tree.

GPIO input hysteresis (Schmitt trigger) can be on or off, output slew rate can be fast or limited, and source and sink current is configurable from 2mA up to 16mA. The chipset GPIO pins 0-27 are in the same block and these properties are set per block, not per pin.

R-Pi PCB Revision 2 UPDATE: The R-Pi Rev.2 board being rolled out starting in September 2012 adds 4 more GPIO on a new connector called P5, and changes some of the existing P1 GPIO pinouts. On Rev2, GPIO_GEN2 [BCM2835/GPIO27] is routed to P1 pin 13, and changes what was SCL0/SDA0 to SCL1/SDA1: SCL1 [BCM2835/GPIO3] is routed to P1 pin 5, SDA1 [BCM2835/GPIO2] is routed to P1 pin 3. Also the power and ground connections previously marked “Do Not Connect” on P1 will remain as connected, specifically: P1-04:+5V0, P1-09:GND, P1-14:GND, P1-17:+3V3, P1-20:GND, P1-25:GND.

P1 Header Pin, top row:

Pin Number Pin Name Rev1 Pin Name Rev2 Hardware Notes Alt 0 Function Other Alternative Functions
P1-02 5V0 Supply through input poly fuse
P1-04 5V0 Supply through input poly fuse
P1-06 GND
P1-08 GPIO 14 Boot to Alt 0 -> UART0_TXD ALT5 = UART1_TXD
P1-10 GPIO 15 Boot to Alt 0 -> UART0_RXD ALT5 = UART1_RXD
P1-12 GPIO 18 PCM_CLK ALT4 = SPI1_CE0_N ALT5 = PWM0
P1-14 GND
P1-16 GPIO23 ALT3 = SD1_CMD ALT4 = ARM_RTCK
P1-18 GPIO24 ALT3 = SD1_DAT0 ALT4 = ARM_TDO
P1-20 GND
P1-22 GPIO25 ALT3 = SD1_DAT1 ALT4 = ARM_TCK
P1-24 GPIO08 SPI0_CE0_N
P1-26 GPIO07 SPI0_CE1_N

P1 header Pin, bottom row:

Pin Number Pin Name Rev1 Pin Name Rev2 Hardware Notes Alt 0 Function Other Alternative Functions
P1-01 3.3 V 50 mA max (01 & 17)
P1-03 GPIO 0 GPIO 2 1K8 pull up resistor I2C0_SDA / I2C1_SDA
P1-05 GPIO 1 GPIO 3 1K8 pull up resistor I2C0_SCL / I2C1_SCL
P1-07 GPIO 4 GPCLK0 ALT5 = ARM_TDI
P1-09 GND
P1-11 GPIO17 ALT3 = UART0_RTS ALT4 = SPI1_CE1_N ALT5 = UART1_RTS
P1-13 GPIO21 GPIO27 PCM_DOUT / reserved ALT4 = SPI1_SCLK ALT5 = GPCLK1 / ALT3 = SD1_DAT3 ALT4 = ARM_TMS
P1-15 GPIO22 ALT3 = SD1_CLK ALT4 = ARM_TRST
P1-17 3.3 V 50 mA max (01 & 17)
P1-19 GPIO10 SPI0_MOSI
P1-21 GPIO9 SPI0_MISO
P1-23 GPIO11 SPI0_SCLK
P1-25 GND

Legend:

Colour legend
+5 V
+3.3 V
Ground, 0V
UART
GPIO
SPI
I²C

Pin 3 (SDA0) and Pin 5 (SCL0) are preset to be used as an I²C interface. So there are 1.8 kilohm pulls up resistors on the board for these pins.

Pin 12 supports PWM .

It is also possible to reconfigure GPIO connector pins P1-7, 15, 16, 18, 22 (chipset GPIOs 4 and 22 to 25) to provide an ARM JTAG interface. However ARM_TMS isn’t available on the GPIO connector (chipset pin 12 or 27 is needed). Chipset pin 27 is available on S5, the CSI camera interface however.

It is also possible to reconfigure GPIO connector pins P1-12 and 13 (chipset GPIO 18 and 21) to provide an I2S (a hardware modification may be required) or PCM interface. However, PCM_FS and PCM_DIN (chipset pins 19 and 20) are needed for I2S or PCM.

A second I²C interface (GPIO02_ALT0 is SDA1 and GPIO03_ALT0 is SCL1) and two further GPIOs (GPIO05_ALT0 is GPCLK1, and GPIO27) are available on S5, the CSI camera interface.

Power pins

The maximum permitted current draw from the 3.3V pins is 50mA.

Maximum permitted current draw from the 5V pin is the USB Input current (usually 1A) minus any current draw from the rest of the board.

  1. Model A: 1000mA – 500mA -> max current draw: 500mA
  2. Model B: 1000mA – 700mA -> max current draw: 300mA

Be very careful with the 5 V pins P1-02 and P1-04. If you short 5 V to any other P1 pin you may permanently damage your RasPi. Before probing P1, it’s a good idea to strip short pieces of insulation off a wire and push them over the 5 V pins so you don’t accidentally short them with a probe.

GPIO Hardware Hacking

The complete list of chipset GPIO pins are available on the GPIO connector is:

0, 1, 4, 7, 8, 9, 10, 11, 14, 15, 17, 18, 21, 22, 23, 24, 25

(On the Revision2.0 Raspberry Pis, this list changes to 2, 3, 4, 7, 8, 9, 10, 11, 14, 15, 17, 18, 22, 23, 24, 25, 27, with 28, 29, 30, 31 additionally available on the P5 header).

P1-03 and P1-05 (SDA0 and SCL0 / SDA1 and SCL1) have 1.8 kiloohm pull-up resistors to 3.3V.

If 17 GPIOs aren’t sufficient for your project, there are a few other signals potentially available, with varying levels of software and hardware (soldering iron) hackery skills:

GPIO02, 03, 05 and 27 are available on S5 (the CSI interface) when a camera peripheral is not connected to that socket, and are configured by default to provide the functions SDA1, SCL1, CAM_CLK and CAM_GPIO respectively. SDA1 and SCL1 have 1K6 pull-up resistors to 3.3 V.

GPIO06 is LAN_RUN and is available on pad 12 of the footprint for IC3 on the Model A. On Model B, it is in use for the Ethernet function.

There are a few other chipset GPIO pins accessible on the PCB but are in use:

  • GPIO16 drives status LED D5 (usually SD card access indicator)
  • GPIO28-31 are used by the board ID and are connected to resistors R3 to R10 (only on Rev1.0 boards).
  • GPIO40 and 45 are used by analogue audio and support PWM. They connect to the analogue audio circuitry via R21 and R27 respectively.
  • GPIO46 is HDMI hotplug detect (goes to pin 6 of IC1).
  • GPIO47 to 53 are used by the SD card interface. In particular, GPIO47 is SD card detect (this would seem to be a good candidate for re-use). GPIO47 is connected to the SD card interface card detect switch; GPIO48 to 53 are connected to the SD card interface via resistors R45 to R50.

Raspberry Pi BCM2835 Datasheet

Based on BCM2835 datasheet, including any relevant errata, with a couple of extra columns.

Any GPIOs that aren’t connected on the RaspberryPi Model B revision 1.0 circuit board are crossed out, and the GPIOs available on the GPIO Connector (P1) are in bold, with their default function (according to the schematics) in bold italics.

GPIO Pins Alternative Function Assignment

Pull ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 RPi Rev1.0 signal name RPi Rev2.0 signal name RPi Rev1.0 connection RPi Rev2.0 connection
GPIO0
High SDA0 SA5 <reserved> SDA0 SDA0 P1-03 S5-14
GPIO1
High SCL0 SA4 <reserved> SCL0 SCL0 P1-05 S5-13
GPIO2
High SDA1 SA3 <reserved> SDA1 SDA1 S5-14 P1-03
GPIO3
High SCL1 SA2 <reserved> SCL1 SCL1 S5-13 P1-05
GPIO4
High GPCLK0 SA1 <reserved> ARM_TDI GPIO_GCLK GPIO_GCLK P1-07 P1-07
GPIO5
High GPCLK1 SA0 <reserved> ARM_TDO CAM_CLK CAM_CLK S5-12 S5-12
GPIO6
High GPCLK2 SOE_N / SE <reserved> ARM_RTCK LAN_RUN LAN_RUN IC3-12 IC3-12
GPIO7
High SPI0_CE1_N SWE_N / SRW_N <reserved> SPI_CE1_N SPI_CE1_N P1-26 P1-26
GPIO8
High SPI0_CE0_N SD0 <reserved> SPI_CE0_N SPI_CE0_N P1-24 P1-24
GPIO9
Low SPI0_MISO SD1 <reserved> SPI_MISO SPI_MISO P1-21 P1-21
GPIO10
Low SPI0_MOSI SD2 <reserved> SPI_MOSI SPI_MOSI P1-19 P1-19
GPIO11
Low SPI0_SCLK SD3 <reserved> SPI_SCLK SPI_SCLK P1-23 P1-23
GPIO12
Low PWM0 SD4 <reserved> ARM_TMS nc nc
GPIO13
Low PWM1 SD5 <reserved> ARM_TCK nc nc
GPIO14
Low TXD0 SD6 <reserved> TXD1 TXD0 TXD0 P1-08 P1-08
GPIO15
Low RXD0 SD7 <reserved> RXD1 RXD0 RXD0 P1-10 P1-10
GPIO16
Low <reserved> SD8 <reserved> CTS0 SPI1_CE2_N CTS1 STATUS_LED_N STATUS_LED_N D5 (OK LED) D5 (ACT LED)
GPIO17
Low <reserved> SD9 <reserved> RTS0 SPI1_CE1_N RTS1 GPIO_GEN0 GPIO_GEN0 P1-11 P1-11
GPIO18
Low PCM_CLK SD10 <reserved> BSCSL SDA / MOSI SPI1_CE0_N PWM0 GPIO_GEN1 GPIO_GEN1 P1-12 P1-12
GPIO19
Low PCM_FS SD11 <reserved> BSCSL SCL / SCLK SPI1_MISO PWM1 nc nc
GPIO20
Low PCM_DIN SD12 <reserved> BSCSL / MISO SPI1_MOSI GPCLK0 nc nc
GPIO21
Low PCM_DOUT SD13 <reserved> BSCSL / CE_N SPI1_SCLK GPCLK1 GPIO_GEN2 CAM_GPIO P1-13 S5-11
GPIO22
Low <reserved> SD14 <reserved> SD1_CLK ARM_TRST GPIO_GEN3 GPIO_GEN3 P1-15 P1-15
GPIO23
Low <reserved> SD15 <reserved> SD1_CMD ARM_RTCK GPIO_GEN4 GPIO_GEN4 P1-16 P1-16
GPIO24
Low <reserved> SD16 <reserved> SD1_DAT0 ARM_TDO GPIO_GEN5 GPIO_GEN5 P1-18 P1-18
GPIO25
Low <reserved> SD17 <reserved> SD1_DAT1 ARM_TCK GPIO_GEN6 GPIO_GEN6 P1-22 P1-22
GPIO26
Low <reserved> <reserved> <reserved> SD1_DAT2 ARM_TDI nc nc
GPIO27
Low <reserved> <reserved> <reserved> SD1_DAT3 ARM_TMS CAM_GPIO GPIO_GEN2 S5-11 P1-13
GPIO28
SDA0 SA5 PCM_CLK <reserved> CONFIG0 GPIO_GEN7 R10 / R8 P5-3
GPIO29
SCL0 SA4 PCM_FS <reserved> CONFIG1 GPIO_GEN8 R9 / R7 P5-4
GPIO30
Low <reserved> SA3 PCM_DIN CTS0 CTS1 CONFIG2 GPIO_GEN9 R6 / R4 P5-5
GPIO31
Low <reserved> SA2 PCM_DOUT RTS0 RTS1 CONFIG3 GPIO_GEN10 R5 / R3 P5-6
GPIO32
Low GPCLK0 SA1 <reserved> TXD0 TXD1 nc nc
GPIO33
Low <reserved> SA0 <reserved> RXD0 RXD1 nc nc
GPIO34
High GPCLK0 SOE_N / SE <reserved> <reserved> nc nc
GPIO35
High SPI0_CE1_N SWE_N / SRW_N <reserved> nc nc
GPIO36
High SPI0_CE0_N SD0 TXD0 <reserved> nc nc
GPIO37
Low SPI0_MISO SD1 RXD0 <reserved> nc nc
GPIO38
Low SPI0_MOSI SD2 RTS0 <reserved> nc nc
GPIO39
Low SPI0_SCLK SD3 CTS0 <reserved> nc nc
GPIO40
Low PWM0 SD4 <reserved> SPI2_MISO TXD1 PWM0_OUT PWM0_OUT R21 R21
GPIO41
Low PWM1 SD5 <reserved> <reserved> SPI2_MOSI RXD1 nc nc
GPIO42
Low GPCLK1 SD6 <reserved> <reserved> SPI2_SCLK RTS1 nc nc
GPIO43
Low GPCLK2 SD7 <reserved> <reserved> SPI2_CE0_N CTS1 nc nc
GPIO44
GPCLK1 SDA0 SDA1 <reserved> SPI2_CE1_N nc nc
GPIO45
PWM1 SCL0 SCL1 <reserved> SPI2_CE2_N PWM1_OUT PWM1_OUT R27 R27
GPIO46
High <internal> HDMI_HPD_P HDMI_HPD_P IC1-6 IC1-6
GPIO47
High <internal> SD_CARD_DET SD_CARD_DET S8-10 S8-10
GPIO48
High <internal> SD_CLK_R SD_CLK_R R48 R48
GPIO49
High <internal> SD_CMD_R SD_CMD_R R47 R47
GPIO50
High <internal> SD_DATA0_R SD_DATA0_R R49 R49
GPIO51
High <internal> SD_DATA1_R SD_DATA1_R R50 R50
GPIO52
High <internal> SD_DATA2_R SD_DATA2_R R45 R45
GPIO53
High <internal> SD_DATA3_R SD_DATA3_R R46 R46
Pull ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 RPi Rev1.0 signal name RPi Rev2.0 signal name RPi Rev1.0 connection RPi Rev2.0 connection

As in the table above, the GPIOs available on the GPIO Connector (P1) are in bold, with their default function (according to the schematics) in bold italics.

Special function legend:

Name Function Datasheet section GPIOs
SDA0
BSC master 0 data line BSC GPIO0 GPIO28 GPIO44
SCL0
BSC master 0 clock line BSC GPIO1 GPIO29 GPIO45
SDA1
BSC master 1 data line BSC GPIO2 GPIO44
SCL1
BSC master 1 clock line BSC GPIO3 GPIO45
GPCLK0
General purpose Clock 0 <TBD> GPIO4 GPIO20 GPIO32 GPIO34
GPCLK1
General purpose Clock 1 <TBD> GPIO5 GPIO21 GPIO42 GPIO44
GPCLK2
General purpose Clock 2 <TBD> GPIO6 GPIO43
SPI0_CE1_N
SPI0 Chip select 1 SPI GPIO7 GPIO35
SPI0_CE0_N
SPI0 Chip select 0 SPI GPIO8 GPIO36
SPI0_MISO
SPI0 MISO SPI GPIO9 GPIO37
SPI0_MOSI
SPI0 MOSI SPI GPIO10 GPIO38
SPI0_SCLK
SPI0 Serial clock SPI GPIO11 GPIO39
PWMx
Pulse Width Modulator 0..1 Pulse Width Modulator PWM0: GPIO12 GPIO18 GPIO40
PWM1: GPIO13 GPIO19 GPIO41 GPIO45
TXD0
UART 0 Transmit Data UART GPIO14 GPIO32 GPIO36
RXD0
UART 0 Receive Data UART GPIO15 GPIO33 GPIO37
CTS0
UART 0 Clear To Send UART GPIO16 GPIO30 GPIO39
RTS0
UART 0 Request To Send UART GPIO17 GPIO31 GPIO38
PCM_CLK
PCM clock PCM Audio GPIO18 GPIO28
PCM_FS
PCM Frame Sync PCM Audio GPIO19 GPIO29
PCM_DIN
PCM Data in PCM Audio GPIO20 GPIO30
PCM_DOUT
PCM data out PCM Audio GPIO21 GPIO31
SAx
Secondary mem Address bus Secondary Memory Interface many
SOE_N / SE
Secondary mem. Controls Secondary Memory Interface GPIO6 GPIO34
SWE_N / SRW_N
Secondary mem. Controls Secondary Memory Interface GPIO7 GPIO35
SDx
Secondary mem. data bus Secondary Memory Interface many
BSCSL SDA / MOSI
BSC slave Data, SPI slave MOSI BSC/SPI slave GPIO18
BSCSL SCL / SCLK
BSC slave Clock, SPI slave clock BSC/SPI slave GPIO19
BSCSL – / MISO
BSC <not used>, SPI MISO BSC/SPI slave GPIO20
BSCSL – / CE_N
BSC <not used>, SPI CSn BSC/SPI slave GPIO21
SPI1_CEx_N
SPI1 Chip select 0-2 Auxiliary I/O SPI1_CE0_N: GPIO18
SPI1_CE1_N: GPIO17
SPI1_CE2_N: GPIO16
SPI1_MISO
SPI1 MISO Auxiliary I/O GPIO19
SPI1_MOSI
SPI1 MOSI Auxiliary I/O GPIO20
SPI1_SCLK
SPI1 Serial clock Auxiliary I/O GPIO21
TXD1
UART 1 Transmit Data Auxiliary I/O GPIO14 GPIO32 GPIO40
RXD1
UART 1 Receive Data Auxiliary I/O GPIO15 GPIO33 GPIO41
CTS1
UART 1 Clear To Send Auxiliary I/O GPIO16 GPIO30 GPIO43
RTS1
UART 1 Request To Send Auxiliary I/O GPIO17 GPIO31 GPIO42
SPI2_CEx_N
SPI2 Chip select 0-2 Auxiliary I/O SPI2_CE0_N: GPIO43
SPI2_CE1_N: GPIO44
SPI2_CE2_N: GPIO45
SPI2_MISO
SPI2 MISO Auxiliary I/O GPIO40
SPI2_MOSI
SPI2 MOSI Auxiliary I/O GPIO41
SPI2_SCLK
SPI2 Serial clock Auxiliary I/O GPIO42
ARM_TRST
ARM JTAG reset <TBD> GPIO22
ARM_RTCK
ARM JTAG return clock <TBD> GPIO6 GPIO23
ARM_TDO
ARM JTAG Data out <TBD> GPIO4 GPIO24
ARM_TCK
ARM JTAG Clock <TBD> GPIO13 GPIO25
ARM_TDI
ARM JTAG Data in <TBD> GPIO4 GPIO26
ARM_TMS
ARM JTAG Mode select <TBD> GPIO12 GPIO27
Name Function Datasheet section GPIOs

P2 Header

P2 header is the VideoCore JTAG and use only during the production of the board. It cannot be used as the ARM JTAG. This connector is unpopulated in Rev 2.0 boards.

RPi_P2_header

Usefule P2 pins:

  1. Pin 1 – 3.3V (same as P1-01, 50mA max current draw across both of them)
  2. Pin 7 – GND
  3. Pin 8 – GND

P3 Header

P3 header, inpopulated, is the LAN9512 JTAG. This header is located directly next to P2 header.

RPi_P3_header

Usefule P3 pins:

  1. Pin 7 – GND

P5 Header

Added with the release of the Revision 2.0 PCB design. This pins located directly next to P1 header.

RPi_P5_header

(Seen from the back of the board).

P5 header pin out, top row:

Pin Number Pin Name Rev2 Hardware Notes Alt 0 Function Other Alternative Functions
P5-01 5V0 Supply through input poly fuse
P5-03 GPIO28 I2C0_SDA ALT2 = PCM_CLK
P5-05 GPIO30 ALT2 = PCM_DIN ALT3 = UART0_CTS ALT5 = UART1_CTS
P5-07 GND

P5 header pin out, bottom row:

Pin Number Pin Name Rev2 Hardware Notes Alt 0 Function Other Alternative Functions
P5-02 3.3 V 50 mA max (combined with P1)
P5-04 GPIO29 I2C0_SCL ALT2 = PCM_FS
P5-06 GPIO31 ALT2 = PCM_DOUT ALT3 = UART0_RTS ALT5 = UART1_RTS
P5-08 GND

Note that the connector is intended to be mounted on the bottom of the PCB, so that for those who put the connector on the top side, the pin numbers are swapped. Pin 1 and pin 2 are swapped, etc.

P6 Header

P6 header was added with the release of the Revision 2.0 PCB design. This header is located next to HDMI output.

RPi_P6_header

P6 pinout:

Pin Number Pin Name Rev2 Hardware Notes
P6-01 RUN Short to ground to reset the BCM2835
P6-02 GND

A reset button can be attached to the P6 header, with which the Pi can be reset. Momentarily shorting the two pins of P6 together will cause a soft reset of the CPU (which can also ‘wake’ the Pi from halt/shutdown state).

Internal Pull-Ups and Pull-Downs

The GPIO ports include the ability to enable and disable internal pull-up or pull-down resistors (see below for code examples/support of this).

Pull-up is Min. 50K Ohm, Max 65 KOhm.

Pull-down is Min. 50K Ohm, Max 60 KOhm.

Software

The foundation (Raspberry Pi Foundation) will not include a GPIO driver in the initial release. However the standard Linux GPIO drivers should work with minimal modification.

The community implemented SPI and I²C drivers, which will be integrated with the new Linux pinctrl.

Further reference

  1. http://en.wikipedia.org/wiki/GPIO

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